An FPGA Implementation of Quantized CNN Hardware for IoT Devices

초록

Due to the recent improvement in the computational power of hardware and the growth of data, a deep learning-based approach that optimizes parameters using massive data showed excellent performance. In computer vision, research using a convolutional neural network(CNN) is being actively conducted. However, it is challenging to apply to IoT devices due to the high computational complexity and massive memory usage required. In this paper, we propose a quantized CNN hardware for IoT devices that optimized memory usage and computation complexity. In addition, we present a quantization framework for the proposed hardware design. The presented framework includes floating-point training, quantization, fully integer arithmetic inference, and hardware design processes. As a result of implementing the quantized CNN on the Xilinx ZC702 evaluation board, power consumption and inference speed improved by 4.86× and 2.58×, respectively, compared to 32-bit floating-point hardware.

제목
An FPGA Implementation of Quantized CNN Hardware for IoT Devices
저자
JINKU KANG
학회명
ICNGC 2021
학회 개최일
2021-11-04 ~ 2021-11-06