Optimizing the crystallinity of ZrO2 gate insulator in indium gallium zinc oxide thin-film transistors through atomic layer deposition process temperature control

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The optimization of zirconium oxide (ZrO<inf>2</inf>) crystallinity for gate insulators (GI) in indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) was studied to enhance the performance of dynamic random-access memory (DRAM) cell transistors. ZrO<inf>2</inf> films were deposited via atomic layer deposition (ALD) at temperatures ranging from 150 °C to 300 °C, yielding varied crystallinity from amorphous to high-crystallinity phases. Meso-crystalline ZrO<inf>2</inf> films deposited at 200 °C achieved an optimal trade-off between ON and OFF current characteristics, attributed to reduced grain boundary leakage and an improved dielectric constant. Films deposited at higher temperatures (250 °C and 300 °C) exhibited increased OFF current and ON/OFF ratio degradation due to crystallization-induced defects, while lower temperatures (150 °C) led to reliability issues from oxygen vacancies and carbon impurities. These results indicate the importance of precise temperature control during the ALD process to achieve meso-crystalline ZrO<inf>2</inf>, ensuring enhanced ON/OFF ratios, and device stability. © The Author(s) 2025.

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BIG DATALOW-VOLTAGEHIGH-KAPPAMEMORYFABRICATIONDIELECTRICSCHANNELTRAPS
제목
Optimizing the crystallinity of ZrO2 gate insulator in indium gallium zinc oxide thin-film transistors through atomic layer deposition process temperature control
저자
Jeong, HanseokYoo, Soo-minChoe, MinkiBaek, InhwanJeon, Woojin
DOI
10.1038/s41598-025-25938-w
발행일
2025-11
유형
Article
저널명
Scientific Reports
15
1