Two-step Time-to-Digital Converter using pulse-shifting time-difference repetition circuit

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5

초록

This paper proposes a two-step TDC (Time-to-digital converter with pulse-shifting TDR (Time-difference repetition) circuit that is improved from the conventional time difference repetition circuit which only served as a time amplifier. The proposed TDC requires no time amplifier. Within the pulse-shifting TDR, two pulses rotate with residual time difference information sharing one loop and perform fine quantization by shifting the pulse with 5ps resolution. This mechanism not only reduces the significant delay mismatches caused by the devices effectively, but also area and power efficient in comparison with conventional two-step TDCs that utilize both the time amplifier and fine TDC. The proposed circuit is fabricated in 180nm process and achieve 8bits 5ps resolution. The conversion rated is 10Ms/s while consuming 2.43mW and occupying 0.18 mm(boolean AND)2 area with 1275ps dynamic range.

키워드

Two-step TDCtime amplifierpulse shrinking TDCtime difference repetitionmismatch cancellation
제목
Two-step Time-to-Digital Converter using pulse-shifting time-difference repetition circuit
저자
Rho, Chang HanKang, Jin-kuLiu, Jin
DOI
10.1109/ISOCC53507.2021.9613975
발행일
2021
유형
Proceedings Paper
저널명
18TH INTERNATIONAL SOC DESIGN CONFERENCE 2021 (ISOCC 2021)
페이지
333 ~ 334